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J. Semicond. > 2008, Volume 29?>?Issue 10?> 2014-2017

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ESD Transient Model of Vertical DMOS Power Devices

Li Zehong, Zhou Chunhua, Hu Yonggui, Liu Yong, Zhang Bo and Xu Shiliu

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Abstract: Based on the equivalent circuit of VDMOS,the initial condition and transient response process are analyzed and the ESD transient model of the power VDMOS device is obtained.Results show that the ESD transient discharge process is correctly depicted with this model,which resolves the problem of the insufficient initial conditions of other models.Based on this model,the relationships between ESD threshold voltage and gate input protection series resistance,breakdown voltage,and parasitic dynamic resistance of the Zener diodes,and gate-source capacitance and gate oxide thickness of the power VDMOS,are obtained.This model can guide the design of ESD protection for power VDMOSs

Key words: VDMOS, ESD, equivalent circuit, initial condition, transient model

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    Received: 18 August 2015 Revised: 24 April 2008 Online: Published: 01 October 2008

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      Li Zehong, Zhou Chunhua, Hu Yonggui, Liu Yong, Zhang Bo, Xu Shiliu. ESD Transient Model of Vertical DMOS Power Devices[J]. Journal of Semiconductors, 2008, 29(10): 2014-2017. ****Li Z H, Zhou C H, Hu Y G, Liu Y, Zhang B, Xu S L. ESD Transient Model of Vertical DMOS Power Devices[J]. J. Semicond., 2008, 29(10): 2014.
      Citation:
      Li Zehong, Zhou Chunhua, Hu Yonggui, Liu Yong, Zhang Bo, Xu Shiliu. ESD Transient Model of Vertical DMOS Power Devices[J]. Journal of Semiconductors, 2008, 29(10): 2014-2017. ****
      Li Z H, Zhou C H, Hu Y G, Liu Y, Zhang B, Xu S L. ESD Transient Model of Vertical DMOS Power Devices[J]. J. Semicond., 2008, 29(10): 2014.

      ESD Transient Model of Vertical DMOS Power Devices

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 4

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China

      • National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China

      • Received Date: 2015-08-18
      • Accepted Date: 2008-03-19
      • Revised Date: 2008-04-24
      • Published Date: 2008-11-11

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