Chin. J. Semicond. > 2007, Volume 28?>?Issue 12?> 1961-1966

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Analysis and Performance of a Smart,High-Voltage SENSFET

Li Zehong, Wang Xiaosong, Wang Yiming, Yi Kun, Zhang Bo and Li Zhaoji

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Abstract: Based on the JFET theory,a smart,high-voltage SENSFET that adopts double RESURF is designed.The implant dose,the start point,the length of the lower electric field layer Pwell2,and the implant dose of Nwell are optimized,and thus we obtain a SENSFET with a breakdown voltage of 730V and a linear resistance of 7.2e5Ω·μm.The experimental results show that the breakdown voltage is 700V and the linear resistance is 10kΩ when the width of the SENSFET is 75μm.The experimental results agree with the numerical results.The SENSFET is used as the detector and self-supply of a smart power integrated circuit.

Key words: smart power integrated circuit, high voltage SENSFET, double RESURF, JFET

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    Received: 18 August 2015 Revised: 20 June 2007 Online: Published: 01 December 2007

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      Li Zehong, Wang Xiaosong, Wang Yiming, Yi Kun, Zhang Bo, Li Zhaoji. Analysis and Performance of a Smart,High-Voltage SENSFET[J]. Journal of Semiconductors, 2007, 28(12): 1961-1966. ****Li Z H, Wang X S, Wang Y M, Yi K, Zhang B, Li Z J. Analysis and Performance of a Smart,High-Voltage SENSFET[J]. Chin. J. Semicond., 2007, 28(12): 1961.
      Citation:
      Li Zehong, Wang Xiaosong, Wang Yiming, Yi Kun, Zhang Bo, Li Zhaoji. Analysis and Performance of a Smart,High-Voltage SENSFET[J]. Journal of Semiconductors, 2007, 28(12): 1961-1966. ****
      Li Z H, Wang X S, Wang Y M, Yi K, Zhang B, Li Z J. Analysis and Performance of a Smart,High-Voltage SENSFET[J]. Chin. J. Semicond., 2007, 28(12): 1961.

      Analysis and Performance of a Smart,High-Voltage SENSFET

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • No.24 Research Institute of CETC,Chongqing 400060,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China

      • Received Date: 2015-08-18
      • Accepted Date: 2007-06-04
      • Revised Date: 2007-06-20
      • Published Date: 2007-11-28

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