Abstract: A 1-write-port 8-read-port 32×32-bit register file has been designed in 1.8V 0.18μm CMOS technology. Low-swing bit-lines are used for both read and write operations. Together with the use of novel memory cells, high speed sensor amplifiers, self-reset address decoders, SCL circuits, clock gating, and delicate time control circuits, it has achieved both high speed and low power. Post-layout simulations in 1.8V with HSPICE indicate a write time of 1.7ns and a read time of 1.32ns. The power dissipation is 70mW for all 9 ports at 500MHz.

Key words: high speed, low power, multi-port, SRAM, register file