Chin. J. Semicond. > 2007, Volume 28?>?Issue 8?> 1179-1183

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Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain

Xu Bojuan, Du Gang, Xia Zhiliang, Zeng Lang, Han Ruqi and Liu Xiaoyan

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Abstract: A quasi two-dimensional (2D) analytical model of a double-gate (DG) MOSFET with Schottky source/drain is developed based on the Poisson equation.The 2D potential distribution in the channel is calculated.An expression for threshold voltage for a short-channel DG MOSFET with Schottky S/D is also presented by defining the turn-on condition.The results of the model are verified by the numerical simulator DESSIS-ISE.

Key words: double-gate, Schottky barrier, threshold voltage

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    Received: 18 August 2015 Revised: 20 April 2007 Online: Published: 01 August 2007

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      Xu Bojuan, Du Gang, Xia Zhiliang, Zeng Lang, Han Ruqi, Liu Xiaoyan. Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain[J]. Journal of Semiconductors, 2007, 28(8): 1179-1183. ****Xu B J, Du G, Xia Z L, Zeng L, Han R Q, Liu X Y. Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain[J]. Chin. J. Semicond., 2007, 28(8): 1179.
      Citation:
      Xu Bojuan, Du Gang, Xia Zhiliang, Zeng Lang, Han Ruqi, Liu Xiaoyan. Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain[J]. Journal of Semiconductors, 2007, 28(8): 1179-1183. ****
      Xu B J, Du G, Xia Z L, Zeng L, Han R Q, Liu X Y. Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain[J]. Chin. J. Semicond., 2007, 28(8): 1179.

      Threshold Voltage Model of a Double-Gate MOSFET with Schottky Source and Drain

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Institute of Microelectronics,Peking University,Beijing 100871,China

      • Received Date: 2015-08-18
      • Accepted Date: 2007-01-30
      • Revised Date: 2007-04-20
      • Published Date: 2007-08-08

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