Abstract: We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling.Experimental results show that the leakage power consumption is underestimated by 52% if thermal effects are omitted.Furthermore,an inconsistency arises when energy and temperature are simultaneously optimized by dynamic voltage scaling.Temperature is a limiting factor for future integrated circuits,and the thermal optimization approach can attain a temperature reduction of up to 12℃ with less than 1.8% energy penalty compared with the energy optimization one.

Key words: CMOS integrated circuits, power model, temperature, DVS