Abstract: This paper presents a novel low noise,low power fully digitally controlled LC oscillator (DCO) for PHS transceivers in an SMIC 0.18μm CMOS process.To improve the performance of the DCO,several circuit techniques,such as inversion-mode digitally controlled MOS varactors,a digitally controlled MOS varactor matrix,dynamic element matching,and a lined MASH ΣΔ modulator,are used.The measured phase noise of this DCO at 100kHz offset frequency at 3.1GHz is below -102.3 and down to -122.6dBc/Hz at 1.2MHz while drawing 2.8mA of current from a 1.8V supply.Compared with state of the art DCOs,the measurement results demonstrate that our DCO features superior phase noise and power consumption.

Key words: CMOS integrated circuits, fully digitally controlled LC oscillator, phase noise, digitally controlled MOS varactor, digital ΣΔ modulator