Abstract: A compact direct digital frequency synthesizer (DDFS) for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed.For small chip size and low power consumption,the phase to sine mapping data is compressed using sine symmetry technique,sine-phase difference technique,quad line approximation technique,and quantization and error read only memory (QE-ROM) technique.The ROM size is reduced by 98% using these techniques.A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process.The core area of the DDFS is 1.6mm2.It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.

Key words: CMOS integrated circuit, DDFS, rubidium atomic frequency standard, SoC