Abstract: A fully on-chip low-dropout linear regulator (LDO) with ultra low noise is presented.This regulator uses a Vt/R based voltage reference rather than a commonly used bandgap reference to minimize the noise introduced by the reference voltage. The Vt/R based voltage reference employs a digital calibration schema to increase the accuracy of the output voltage.This fully on-chip LDO is designed in a TSMC 0.18μm RF CMOS process for the power supply of a low phase noise phase lock loop (PLL) with 10mA of DC current consumption.The simulation results indicate that the total output noise of the LDO is 26nV/Hz@100kHz and 14nV/Hz@1MHz,and the power supply reject ratio is -40dB@1MHz and less than -34dB in all frequency bands.The test results show that the phase noise of the PLL using this LDO is 6dBc@1kHz less and 2dBc@200kHz less than using conventional LDO.

Key words: low-dropout regulator, low noise, SOC, radio frequency receiver