Abstract: In order to improve the accuracy of the output voltage of a LDO,which consumes low quiescent current,a novel dual active compensation technique is used to design a LDO.It can produce two system zeros varying from load current to cancel the negative effect of the pole at different loads on the system’s stability.Compared with traditional compensation,the dual active compensation does not consume current.The quiescent current of the proposed LDO is less than 1μA,and the fold back current limit reduces the power consumption of the chip.A low quiescent current LDO employing the dual active compensation technique is implemented in a Hynix 0.5μm CMOS process.The dropout voltage is 150mV when the load current is 300mA,the line regulation is 2mV/V,and the load regulation is 0.75%,indicating that the circuit works well and effectively.

Key words: low drop-out,  stability, dual active compensation, low consumption