J. Semicond. > 2018, Volume 39?>?Issue 11?> 114001

SEMICONDUCTOR DEVICES

Impact of design and process variation on the fabrication of SiC diodes

Y. K. Sharma1, Huaping Jiang1, 2, , Changwei Zheng1, 2, Xiaoping Dai1, 2, Yangang Wang1 and I. Deviny1

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 Corresponding author: Huaping Jiang, aceyogesh83@gmail.com

DOI: 10.1088/1674-4926/39/11/114001

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Abstract: We have studied the influence of design and process variations on the electrical performance of SiC Schottky diodes. On the design side, two design variations are used in the active cell of the diode (segment design and stripe design). In addition, there are two more design variations employed for the edge termination layout of the diodes, namely, field limiting ring (FLR) and junction termination extension (JTE). On the process side, some diodes have gone through an N2O annealing step. The segment design resulted in a lower forward voltage drop (VF) in the diodes and the FLR design turned out to be a better choice for blocking voltages, in the reverse bias. Also, N2O annealing has shown a detrimental effect on the diodes’ blocking performance, which have JTE as their termination design. It degrades the blocking capability of the diodes significantly.

Key words: SiC, JBS diode, N2O annealing, hybrid SiC, IGBT



[1]
Mikamura Y, Hiratsuka K, Tsuno T, et al. Novel designed SiC devices for high power and high efficiency systems. IEEE Trans Electron Devices, 2015, 62(2): 382 doi: 10.1109/TED.2014.2362537
[2]
Trew R J, Yan J B, Mock P M. The potential of diamond and SiC electronic devices for microwave and millimeter-wave power applications. Proc IEEE, 1991, 79(5): 598 doi: 10.1109/5.90128
[3]
Wondrak W, Held R, Niemann E, et al. SiC devices for advanced power and high-temperature applications. IEEE Trans Ind Electron, 2001, 48(2): 307 doi: 10.1109/41.915409
[4]
Mikamura Y, Hiratsuka K, Tsuno T, et al. Novel designed SiC devices for high power and high efficiency systems. IEEE Trans Electron Devices, 2015, 62(2): 382-9 doi: 10.1109/TED.2014.2362537
[5]
She X, Huang A Q, Lucía ó, et al. Review of silicon carbide power devices and their applications. IEEE Trans Ind Electron, 2017, 64(10): 8193 doi: 10.1109/TIE.2017.2652401
[6]
Levinshtein M E, Rumyantsev S L, Shur M S. Properties of advanced semiconductor materials: GaN, AlN, InN, BN, SiC, SiGe. John Wiley & Sons, 2001
[7]
Millan J, Godignon P, Perpina X, et al. A survey of wide bandgap power semiconductor devices. IEEE Trans Power Electron, 2014, 29(5): 2155 doi: 10.1109/TPEL.2013.2268900
[8]
Kimoto T. Material science and device physics in SiC technology for high-voltage power devices. Jpn J Appl Phys, 2015, 54(4): 040103 doi: 10.7567/JJAP.54.040103
[9]
Shang F, Arribas A P, Krishnamurthy M. A comprehensive evaluation of SiC devices in traction applications. IEEE Transportation Electrification Conference and Expo, 2014: 5
[10]
Sharma Y. Advanced SiO2/SiC interface passivation. PhD Dissertain, Auburn University USA, 2012.
[11]
Zetterling C M. Process technology for silicon carbide devices. London: INSPEC, 2002
[12]
Kimoto T, Cooper J A. Fundamentals of silicon carbide technology: growth, characterization, devices and applications. John Wiley & Sons, 2014
[13]
Gao F, Weber W J, Posselt M, et al. Atomistic study of intrinsic defect migration in 3C-SiC. Phys Rev B, 2004, 69(24): 245205 doi: 10.1103/PhysRevB.69.245205
[14]
Morkoc H, Strite S, Gao G B, et al. Large-band-gap SiC, III–V nitride, and II–VI ZnSe-based semiconductor device technologies. J Appl Phys, 1994, 76(3): 1363 doi: 10.1063/1.358463
[15]
Ueno K, Oikawa T. Counter-doped MOSFETs of 4H-SiC. IEEE Electron Device Lett, 1999, 20(12): 624 doi: 10.1109/55.806105
[16]
Roccaforte F, Fiorenza P, Greco G, et al. Recent advances on dielectrics technology for SiC and GaN power devices. Appl Surf Sci, 2014, 301: 9 doi: 10.1016/j.apsusc.2014.01.063
[17]
Xu Y, Xu C, Liu G, et al. Concentration, chemical bonding, and etching behavior of P and N at the SiO2/SiC (0001) interface. J Appl Phys, 2015, 118(23): 235303 doi: 10.1063/1.4937400
Fig. 1.  Two main design variations used during the fabrication of 1.7 kV, 50 A SiC devices. For the active cell there is either a stripe design or a segment design which is used while in the case of termination there are FLR (field limiting ring) and JTE (junction termination extension) variations implemented.

Fig. 2.  Two process variations performed on these devices are: dose, N2O passivation. In the case of dose, different doses are used to create the structure in active and termination regions of the device. In the second process split, before depositing Schottky metal, in some cases N2O annealing is done (w/).

Fig. 3.  A schematic of a Schottky diode (JBS).

Fig. 4.  A schematic of (a) a stripe design and (b) a segment design which are used in the active region of the diode.

Fig. 5.  Typical forward characteristics of N2O annealed 1.7 kV, 4 A SiC Schottky diodes at room temperature for different designs namely: (a) stripe designs (d1–d3) and (b) segments designs (d4–d8) in the active region of the diodes. For stripe designs the VF drop at 4 A is higher than any of the segments designs.

Fig. 6.  Typical reverse characteristics of N2O annealed 1.7 kV, 4 A SiC Schottky diodes at room temperature for different termination designs namely: (a) junction termination extension (JTE) and (b) field limiting ring (FLR) in the termination region of the diodes. Only diodes with FLR termination design are able to provide the required blocking voltage.

Fig. 7.  Typical forward characteristics of 1.7 kV, 4 A SiC Schottky diodes at room temperature without (w/o) NO annealing for different designs namely: (a) stripe designs (d1–d3) and (b) segments designs (d4–d8) in the active region of the diodes.

Fig. 8.  Typical reverse characteristics of 1.7 kV, 4 A SiC Schottky diodes without (w/o) N2O annealing at room temperature for different termination designs namely: (a) junction termination extension (JTE) and (b) field limiting ring (FLR) in the termination region of the diodes. Both termination design variations are able to block voltages ≥ 1700 V.

Fig. 9.  (a) Forward-bias characteristics of 1.7 kV, 50 A Schottky diodes at room temperature with different active cell designs but with same FLR design. (b) Reverse-bias characteristics of a 1.7 kV, 50 A Schottky diode at room temperature.

Table 1.   Different type of designs employed in the active region of 1.7 kV, 4 A diodes. Designs d1–d3 are different stripe design variations, while d4–d8 are the variations used in the segment design.

Design Type w (μm) s (μm) l (μm)
d1 Stripe-1 w1 s1 –
d2 Stripe-2 w1 s2 –
d3 Stripe-3 w1 s3 –
d4 Segment-4 w1 s3 l4
d5 Segment-5 w1 s4 l5
d6 Segment-6 w1 s4 l6
d7 Segment-7 w2 s3 l3
d8 Segment-8 w3 s3 l3
DownLoad: CSV

Table 2.   Summary of the forward voltage drop (VF) and the reverse blocking voltage (VR) obtained from different diodes tested on wafers 1 to 4 (wf1–wf4).

Wafer # VF, max (V) at 4 A VF, min (V) at 4 A VR, max (kV) Outcome (based on the BV of 1.7 kV)
1 2.62 1.66 1 0%
2 2.47 1.68 1 0%
3 2.42 1.60 1 0%
4 2.55 1.63 1.5 0%
5 (w/o NO) 2.23 1.58 1.9* 77.2% of the tested devices blocked 1.7 kV.
* The minimum and maximum values of IR at 1.9 kV for wafer 5 are 1.64 × 10?4 and 9.47 × 10?4 A respectively.
DownLoad: CSV

Table 3.   Summary of the forward voltage drop (VF) and the reverse blocking voltage (VR) obtained from the diodes tested fabricated on wafer 5 without N2O annealing.

Wafer # VF, max (V) at 4 A VF, min (V) at 4 A IR, max (A) at 1.9 kV IR, min (A) at 1.9 kV Outcome (based on the BV of 1.7 KV)
1 2.32 1.70 8.5 × 10?5 1.65 × 10?4 91%
2 2.22 1.77 9.1 × 10?5 2.45 × 10?4 87.5%
3 2.13 1.55 1.38 × 10?4 8.8 × 10?4 100%
4 2.20 1.60 3.2 × 10?5 4.20 × 10?4 100%
5 (w/o NO) 2.31 1.54 1.67 × 10?4 9.47 × 10?4 75%
DownLoad: CSV

Table 4.   Different electrical parameters namely Irr, Qrr and Erec extracted for a 50 A Schottky diode and a conventional Si diode using a double-pulse test.

Substrate type dl/dt (A/μs) Eon (J) Irr (μA) Qrr (μC) Erec (J) Eoff (J)
Full Si substrate 280 0.017 71 17 0.009 0.07
Hybrid SiC substrate 303 0.009 18 2 0.001 0.08
DownLoad: CSV
[1]
Mikamura Y, Hiratsuka K, Tsuno T, et al. Novel designed SiC devices for high power and high efficiency systems. IEEE Trans Electron Devices, 2015, 62(2): 382 doi: 10.1109/TED.2014.2362537
[2]
Trew R J, Yan J B, Mock P M. The potential of diamond and SiC electronic devices for microwave and millimeter-wave power applications. Proc IEEE, 1991, 79(5): 598 doi: 10.1109/5.90128
[3]
Wondrak W, Held R, Niemann E, et al. SiC devices for advanced power and high-temperature applications. IEEE Trans Ind Electron, 2001, 48(2): 307 doi: 10.1109/41.915409
[4]
Mikamura Y, Hiratsuka K, Tsuno T, et al. Novel designed SiC devices for high power and high efficiency systems. IEEE Trans Electron Devices, 2015, 62(2): 382-9 doi: 10.1109/TED.2014.2362537
[5]
She X, Huang A Q, Lucía ó, et al. Review of silicon carbide power devices and their applications. IEEE Trans Ind Electron, 2017, 64(10): 8193 doi: 10.1109/TIE.2017.2652401
[6]
Levinshtein M E, Rumyantsev S L, Shur M S. Properties of advanced semiconductor materials: GaN, AlN, InN, BN, SiC, SiGe. John Wiley & Sons, 2001
[7]
Millan J, Godignon P, Perpina X, et al. A survey of wide bandgap power semiconductor devices. IEEE Trans Power Electron, 2014, 29(5): 2155 doi: 10.1109/TPEL.2013.2268900
[8]
Kimoto T. Material science and device physics in SiC technology for high-voltage power devices. Jpn J Appl Phys, 2015, 54(4): 040103 doi: 10.7567/JJAP.54.040103
[9]
Shang F, Arribas A P, Krishnamurthy M. A comprehensive evaluation of SiC devices in traction applications. IEEE Transportation Electrification Conference and Expo, 2014: 5
[10]
Sharma Y. Advanced SiO2/SiC interface passivation. PhD Dissertain, Auburn University USA, 2012.
[11]
Zetterling C M. Process technology for silicon carbide devices. London: INSPEC, 2002
[12]
Kimoto T, Cooper J A. Fundamentals of silicon carbide technology: growth, characterization, devices and applications. John Wiley & Sons, 2014
[13]
Gao F, Weber W J, Posselt M, et al. Atomistic study of intrinsic defect migration in 3C-SiC. Phys Rev B, 2004, 69(24): 245205 doi: 10.1103/PhysRevB.69.245205
[14]
Morkoc H, Strite S, Gao G B, et al. Large-band-gap SiC, III–V nitride, and II–VI ZnSe-based semiconductor device technologies. J Appl Phys, 1994, 76(3): 1363 doi: 10.1063/1.358463
[15]
Ueno K, Oikawa T. Counter-doped MOSFETs of 4H-SiC. IEEE Electron Device Lett, 1999, 20(12): 624 doi: 10.1109/55.806105
[16]
Roccaforte F, Fiorenza P, Greco G, et al. Recent advances on dielectrics technology for SiC and GaN power devices. Appl Surf Sci, 2014, 301: 9 doi: 10.1016/j.apsusc.2014.01.063
[17]
Xu Y, Xu C, Liu G, et al. Concentration, chemical bonding, and etching behavior of P and N at the SiO2/SiC (0001) interface. J Appl Phys, 2015, 118(23): 235303 doi: 10.1063/1.4937400

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    Received: 16 February 2018 Revised: 12 April 2018 Online: Uncorrected proof: 28 June 2018Published: 01 November 2018

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      Y. K. Sharma, Huaping Jiang, Changwei Zheng, Xiaoping Dai, Yangang Wang, I. Deviny. Impact of design and process variation on the fabrication of SiC diodes[J]. Journal of Semiconductors, 2018, 39(11): 114001. doi: 10.1088/1674-4926/39/11/114001 ****Y K Sharma, H P Jiang, C W Zheng, X P Dai, Y G Wang, I Deviny, Impact of design and process variation on the fabrication of SiC diodes[J]. J. Semicond., 2018, 39(11): 114001. doi: 10.1088/1674-4926/39/11/114001.
      Citation:
      Y. K. Sharma, Huaping Jiang, Changwei Zheng, Xiaoping Dai, Yangang Wang, I. Deviny. Impact of design and process variation on the fabrication of SiC diodes[J]. Journal of Semiconductors, 2018, 39(11): 114001. doi: 10.1088/1674-4926/39/11/114001 ****
      Y K Sharma, H P Jiang, C W Zheng, X P Dai, Y G Wang, I Deviny, Impact of design and process variation on the fabrication of SiC diodes[J]. J. Semicond., 2018, 39(11): 114001. doi: 10.1088/1674-4926/39/11/114001.

      Impact of design and process variation on the fabrication of SiC diodes

      DOI: 10.1088/1674-4926/39/11/114001
      • 1.

        Dynex Semiconductor Ltd, Lincoln, UK

      • 2.

        Zhuzhou CRRC Times Electric Co. Ltd., Zhuzhou 412001, China

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      • Corresponding author: aceyogesh83@gmail.com
      • Received Date: 2018-02-16
      • Revised Date: 2018-04-12
      • Published Date: 2018-11-01

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