Pathways of advanced 3D integration based on two-dimensional materials

Qian He; Hailiang Wang; Yishu Zhang; Bin Yu

doi:10.1088/1674-4926/26020039

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J. Semicond. > Just Accepted

RESEARCH HIGHLIGHTS

Pathways of advanced 3D integration based on two-dimensional materials

Qian He^{1, §}, Hailiang Wang^{1, §}, Yishu Zhang^{1, 2,} and Bin Yu^1,

+ Author Affiliations

1. College of Integrated Circuits, Zhejiang University, Hangzhou, Zhejiang 311200, China
2. ZJU-Hangzhou Global Scientific and Technological Innovation Center, Hangzhou, Zhejiang 310020, China
^§Qian He and Hailiang Wang contributed equally to this work.

Author Bio:

Qian He He Qian is currently pursuing a PhD at the School of Integrated Circuits, Zhejiang University. Her current research focus is on the development and integration of novel synaptic devices based on two-dimensional neuromorphic computing.

Hailiang Wang is a doctoral student at the School of Integrated Circuits, Zhejiang University. His research focuses on post-Moore two-dimensional neuromorphic hardware computation matrices and systems.

Yishu Zhang Zhang Yishu is a researcher at the School of Integrated Circuits, Zhejiang University. He graduated with a PhD from the Singapore University of Science and Technology in 2019 and is a senior member of IEEE and a member of the Zhejiang Youth High-Level Talent Association. He has long been engaged in the research of neuromorphic computing using new types of memory and has published over 80 academic papers.

Bin Yu is currently a professor at Zhejiang University. He received his PhD of electronic engineering from the University of California, Berkeley. He is a NAI Fellow, IEEE Fellow, and has received the IEEE Distinguished Speech Award and IBM Scholar Award. Research interests include neuromorphic perception and computing, post-Moore's electronics, next-generation information devices, advanced micro-nano integrated chips, and more.

Corresponding author: Yishu Zhang, zhangyishu@zju.edu.cn; Bin Yu, yu-bin@zju.edu.cn

DOI: 10.1088/1674-4926/26020039CSTR: 32376.14.1674-4926.26020039

References

[1]	Yang P F, Zou X L, Zhang Z P, et al. Batch production of 6-inch uniform monolayer molybdenum disulfide catalyzed by sodium in glass. Nat Commun, 2018, 9: 979 doi: 10.1038/s41467-018-03388-5
[2]	Chen X Y, Xie Y F, Sheng Y C, et al. Wafer-scale functional circuits based on two dimensional semiconductors with fabrication optimized by machine learning. Nat Commun, 2021, 12: 5953 doi: 10.1038/s41467-021-26230-x
[3]	Sadaf M U K, Chen Z H, Subbulakshmi Radhakrishnan S, et al. Enabling static random-access memory cell scaling with monolithic 3D integration of 2D field-effect transistors. Nat Commun, 2025, 16: 4879 doi: 10.1038/s41467-025-59993-8
[4]	Sivan M, Li Y D, Veluri H, et al. All WSe₂ 1T1R resistive RAM cell for future monolithic 3D embedded memory integration. Nat Commun, 2019, 10: 5201 doi: 10.1038/s41467-019-13176-4
[5]	Zhu K C, Pazos S, Aguirre F, et al. Hybrid 2D–CMOS microchips for memristive applications. Nature, 2023, 618(7963): 57 doi: 10.1038/s41586-023-05973-1
[6]	Liu L, Li T T, Ma L, et al. Uniform nucleation and epitaxy of bilayer molybdenum disulfide on sapphire. Nature, 2022, 605(7908): 69 doi: 10.1038/s41586-022-04523-5
[7]	Lu D L, Chen Y, Lu Z Y, et al. Monolithic three-dimensional tier-by-tier integration via van der Waals lamination. Nature, 2024, 630(8016): 340 doi: 10.1038/s41586-024-07406-z
[8]	Kang J H, Shin H, Kim K S, et al. Monolithic 3D integration of 2D materials-based electronics towards ultimate edge computing solutions. Nat Mater, 2023, 22(12): 1470 doi: 10.1038/s41563-023-01704-z
[9]	Li X, Wu G L, Zhang L N, et al. Single-crystal two-dimensional material epitaxy on tailored non-single-crystal substrates. Nat Commun, 2022, 13: 1773 doi: 10.1038/s41467-022-29451-w
[10]	Guo Y M, Li J X, Zhan X P, et al. Van der Waals polarity-engineered 3D integration of 2D complementary logic. Nature, 2024, 630(8016): 346 doi: 10.1038/s41586-024-07438-5
[11]	Liu C S, Jiang Y B, Shen B Q, et al. A full-featured 2D flash chip enabled by system integration. Nature, 2025, 646(8087): 1081 doi: 10.1038/s41586-025-09621-8
[12]	Ao M R, Zhou X C, Kong X J, et al. A RISC-V 32-bit microprocessor based on two-dimensional semiconductors. Nature, 2025, 640(8059): 654 doi: 10.1038/s41586-025-08759-9
[13]	Ning H K, Wen H D, Meng Y, et al. An index-free sparse neural network using two-dimensional semiconductor ferroelectric field-effect transistors. Nat Electron, 2025, 8(3): 222 doi: 10.1038/s41928-024-01328-4
[14]	Fan D X, Li W S, Qiu H, et al. Two-dimensional semiconductor integrated circuits operating at gigahertz frequencies. Nat Electron, 2023, 6(11): 879 doi: 10.1038/s41928-023-01052-5
[15]	Goossens S, Navickaite G, Monasterio C, et al. Broadband image sensor array based on graphene–CMOS integration. Nat Photonics, 2017, 11(6): 366 doi: 10.1038/nphoton.2017.75

Fig. 1. (Color online) A schematic of the 3D integration hardware development roadmap based on 2D materials. Image adapted from Springer Nature^[1?6].

DownLoad: Full-Size Img PowerPoint

Fig. 2. (Color online) The route of 2D material-CMOS 3D heterogeneous integrated circuit. Image adapted from Springer Nature^[9?13].

DownLoad: Full-Size Img PowerPoint

[1]	Yang P F, Zou X L, Zhang Z P, et al. Batch production of 6-inch uniform monolayer molybdenum disulfide catalyzed by sodium in glass. Nat Commun, 2018, 9: 979 doi: 10.1038/s41467-018-03388-5
[2]	Chen X Y, Xie Y F, Sheng Y C, et al. Wafer-scale functional circuits based on two dimensional semiconductors with fabrication optimized by machine learning. Nat Commun, 2021, 12: 5953 doi: 10.1038/s41467-021-26230-x
[3]	Sadaf M U K, Chen Z H, Subbulakshmi Radhakrishnan S, et al. Enabling static random-access memory cell scaling with monolithic 3D integration of 2D field-effect transistors. Nat Commun, 2025, 16: 4879 doi: 10.1038/s41467-025-59993-8
[4]	Sivan M, Li Y D, Veluri H, et al. All WSe₂ 1T1R resistive RAM cell for future monolithic 3D embedded memory integration. Nat Commun, 2019, 10: 5201 doi: 10.1038/s41467-019-13176-4
[5]	Zhu K C, Pazos S, Aguirre F, et al. Hybrid 2D–CMOS microchips for memristive applications. Nature, 2023, 618(7963): 57 doi: 10.1038/s41586-023-05973-1
[6]	Liu L, Li T T, Ma L, et al. Uniform nucleation and epitaxy of bilayer molybdenum disulfide on sapphire. Nature, 2022, 605(7908): 69 doi: 10.1038/s41586-022-04523-5
[7]	Lu D L, Chen Y, Lu Z Y, et al. Monolithic three-dimensional tier-by-tier integration via van der Waals lamination. Nature, 2024, 630(8016): 340 doi: 10.1038/s41586-024-07406-z
[8]	Kang J H, Shin H, Kim K S, et al. Monolithic 3D integration of 2D materials-based electronics towards ultimate edge computing solutions. Nat Mater, 2023, 22(12): 1470 doi: 10.1038/s41563-023-01704-z
[9]	Li X, Wu G L, Zhang L N, et al. Single-crystal two-dimensional material epitaxy on tailored non-single-crystal substrates. Nat Commun, 2022, 13: 1773 doi: 10.1038/s41467-022-29451-w
[10]	Guo Y M, Li J X, Zhan X P, et al. Van der Waals polarity-engineered 3D integration of 2D complementary logic. Nature, 2024, 630(8016): 346 doi: 10.1038/s41586-024-07438-5
[11]	Liu C S, Jiang Y B, Shen B Q, et al. A full-featured 2D flash chip enabled by system integration. Nature, 2025, 646(8087): 1081 doi: 10.1038/s41586-025-09621-8
[12]	Ao M R, Zhou X C, Kong X J, et al. A RISC-V 32-bit microprocessor based on two-dimensional semiconductors. Nature, 2025, 640(8059): 654 doi: 10.1038/s41586-025-08759-9
[13]	Ning H K, Wen H D, Meng Y, et al. An index-free sparse neural network using two-dimensional semiconductor ferroelectric field-effect transistors. Nat Electron, 2025, 8(3): 222 doi: 10.1038/s41928-024-01328-4
[14]	Fan D X, Li W S, Qiu H, et al. Two-dimensional semiconductor integrated circuits operating at gigahertz frequencies. Nat Electron, 2023, 6(11): 879 doi: 10.1038/s41928-023-01052-5
[15]	Goossens S, Navickaite G, Monasterio C, et al. Broadband image sensor array based on graphene–CMOS integration. Nat Photonics, 2017, 11(6): 366 doi: 10.1038/nphoton.2017.75

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Received: 10 February 2026 Revised: Online: Accepted Manuscript: 24 March 2026

Article Navigation > Journal of Semiconductors > 2026 > Accepted Manuscript

Qian He, Hailiang Wang, Yishu Zhang, Bin Yu. Pathways of advanced 3D integration based on two-dimensional materials[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/26020039 ****Q He, H L Wang, Y S Zhang, and B Yu, Pathways of advanced 3D integration based on two-dimensional materials[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/26020039

Citation:

Qian He, Hailiang Wang, Yishu Zhang, Bin Yu. Pathways of advanced 3D integration based on two-dimensional materials[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/26020039 ****

Q He, H L Wang, Y S Zhang, and B Yu, Pathways of advanced 3D integration based on two-dimensional materials[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/26020039

Citation:

Q He, H L Wang, Y S Zhang, and B Yu, Pathways of advanced 3D integration based on two-dimensional materials[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/26020039

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Pathways of advanced 3D integration based on two-dimensional materials

DOI: 10.1088/1674-4926/26020039

CSTR: 32376.14.1674-4926.26020039

Qian He^{1, §},
Hailiang Wang^{1, §},
Yishu Zhang^{1, 2,},
Bin Yu^1,

1.
College of Integrated Circuits, Zhejiang University, Hangzhou, Zhejiang 311200, China
2.
ZJU-Hangzhou Global Scientific and Technological Innovation Center, Hangzhou, Zhejiang 310020, China

More Information

Qian He：He Qian is currently pursuing a PhD at the School of Integrated Circuits, Zhejiang University. Her current research focus is on the development and integration of novel synaptic devices based on two-dimensional neuromorphic computing
Hailiang Wang is a doctoral student at the School of Integrated Circuits, Zhejiang University. His research focuses on post-Moore two-dimensional neuromorphic hardware computation matrices and systems
Yishu Zhang：Zhang Yishu is a researcher at the School of Integrated Circuits, Zhejiang University. He graduated with a PhD from the Singapore University of Science and Technology in 2019 and is a senior member of IEEE and a member of the Zhejiang Youth High-Level Talent Association. He has long been engaged in the research of neuromorphic computing using new types of memory and has published over 80 academic papers
Bin Yu is currently a professor at Zhejiang University. He received his PhD of electronic engineering from the University of California, Berkeley. He is a NAI Fellow, IEEE Fellow, and has received the IEEE Distinguished Speech Award and IBM Scholar Award. Research interests include neuromorphic perception and computing, post-Moore's electronics, next-generation information devices, advanced micro-nano integrated chips, and more
Corresponding author: zhangyishu@zju.edu.cn; yu-bin@zju.edu.cn
Received Date: 2026-02-10
Available Online: 2026-03-24

Abstract

^§Qian He and Hailiang Wang contributed equally to this work.

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