Abstract: This paper presents a fully-differential CMOS dynamic comparator for use in high-speed pipelined ADCs with low stage resolution.Because the architecture is based on the coupled current sources and differential input pairs,this comparator’s threshold voltage can be adjusted to a desired level.Compared with traditional comparators,this one shows significant improvement in area,power,and speed.Fabricated in 0.35μm CMOS technology,it occupies only 30μm×70μm.Simulation and measurement results indicate the comparator has a sampling frequency up to 1GHz with 2Vpp differential input signal range and only 181μW power consumption under a 3.3V supply.The speed/power ratio reaches up to 5524GS/J.

Key words: CMOS, comparator, ADC