Abstract: This paper presents a 2GS/s 10bit CMOS digital-to-analog converter (DAC) that consists of two unit current-cell matrixes for 6MSBs and 4LSBs,respectively,trading off between the precision and size of the chip.Current mode logic (CML) is used to ensure high speed,and a double centro-symmetric current matrix is designed by the Q2 random walk strategy in order to ensure the linearity of the DAC.The DAC occupies 2.2mm×2.2mm of die area and consumes 790mW with a single 3.3V power supply.

Key words: D/A converter, current steering, CMOS mixed integrated circuit, Q2 random walk