Abstract: A novel large-signal equivalent circuit model of RF-SOI LDMOS based on Philips MOS Model 20 (MM20) is presented.The weak avalanche effect and the power dissipation caused by self-heating are described.The RF parasitic elements are extracted directly from measured S-parameters with analytical methods.Their final values can be obtained quickly and accurately through the necessary optimization.The model is validated in DC,AC small-signal,and large-signal analyses for an RF-SOI LDMOS of 20-fingers (channel mask length,L=1μm,finger width,W=50μm) gate with high resistivity substrate and body-contact.Excellent agreement is achieved between simulated and measured results for DC,S-parameters (10MHz~2.01GHz),and power characteristics,which shows our model is accurate and reliable.MM20 is improved for RF-SOI LDMOS large-signal applications.This model has been implemented in Verilog-A using the ADS circuit simulator (hpeesofsim).

Key words: RF-SOI LDMOS, large-signal model, MOS Model 20, harmonic power, Verilog-A