LETTERS
Zhu Haobo, Mao Luhong, Yu Changliang, Chen Hongda and Tang Jun
Abstract: The design and fabrication of a high speed,12-channel monolithic integrated CMOS optoelectronic integrated circuit (OEIC) receiver are reported.Each channel of the receiver consists of a photodetector,a transimpedance amplifier,and a post-amplifier.The double photodiode structure speeds up the receiver but hinders responsivity.The adoption of active inductors in the TIA circuit extends the -3dB bandwidth to a higher level.The receiver has been realized in a CSMC 0.6μm standard CMOS process.The measured results show that a single channel of the receiver is able to work at bit rates of 0.8~1.4Gb/s.Altogether,the 12-channel OEIC receiver chip can be operated at 15Gb/s.
Key words: CMOS, optoelectronics, parallel receiver, high speed
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Received: 18 August 2015 Revised: 14 May 2007 Online: Published: 01 September 2007
| Citation: |
Zhu Haobo, Mao Luhong, Yu Changliang, Chen Hongda, Tang Jun. A High Speed,12-Channel Parallel,Monolithic IntegratedCMOS OEIC Receiver[J]. Journal of Semiconductors, 2007, 28(9): 1341-1345.
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Zhu H B, Mao L H, Yu C L, Chen H D, Tang J. A High Speed,12-Channel Parallel,Monolithic IntegratedCMOS OEIC Receiver[J]. Chin. J. Semicond., 2007, 28(9): 1341.
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