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J. Semicond. > 2021, Volume 42?>?Issue 2?> 020301

COMMENTS AND OPINIONS

Design technology co-optimization towards sub-3 nm technology nodes

Genquan Han and Yue Hao

+ Author Affiliations

 Corresponding author: Genquan Han, gqhan@xidian.edu.cn; Yue Hao, yhao@xidian.edu.cn

DOI: 10.1088/1674-4926/42/2/020301

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[1]
Bae G, Bae D I, Kang M, et al. 3nm GAA technology featuring multi-bridge-channel FET for low power and high performance applications. 2018 IEEE International Electron Devices Meeting (IEDM), 2018, 28
[2]
Weckx P, Ryckaert J, Litta E D, et al. Novel forksheet device architecture as ultimate logic scaling device towards 2nm. 2019 IEEE International Electron Devices Meeting (IEDM), 2019, 36
[3]
Ryckaert J, Schuddinck P, Weckx P, et al. The complementary FET (CFET) for CMOS scaling beyond N3. 2018 IEEE Symposium on VLSI Technology, 2018, 141
[4]
Liu M, Scholz S, Mertens K, et al. First demonstration of vertical Ge0.92Sn0.08/Ge and Ge GAA nanowire nMOSFETs with low SS of 66 mV/dec and small DIBL of 35 mV/V. 2019 IEEE International Electron Devices Meeting (IEDM), 2019, 29
[5]
Hills G, Lau C, Wright A, et al. Modern microprocessor built from complementary carbon nanotube transistors. Nature, 2019, 572(7771), 595 doi: 10.1038/s41586-019-1493-8
Fig. 1.  (Color online) Logic transistor roadmap in the era of post Moore’s Law.

[1]
Bae G, Bae D I, Kang M, et al. 3nm GAA technology featuring multi-bridge-channel FET for low power and high performance applications. 2018 IEEE International Electron Devices Meeting (IEDM), 2018, 28
[2]
Weckx P, Ryckaert J, Litta E D, et al. Novel forksheet device architecture as ultimate logic scaling device towards 2nm. 2019 IEEE International Electron Devices Meeting (IEDM), 2019, 36
[3]
Ryckaert J, Schuddinck P, Weckx P, et al. The complementary FET (CFET) for CMOS scaling beyond N3. 2018 IEEE Symposium on VLSI Technology, 2018, 141
[4]
Liu M, Scholz S, Mertens K, et al. First demonstration of vertical Ge0.92Sn0.08/Ge and Ge GAA nanowire nMOSFETs with low SS of 66 mV/dec and small DIBL of 35 mV/V. 2019 IEEE International Electron Devices Meeting (IEDM), 2019, 29
[5]
Hills G, Lau C, Wright A, et al. Modern microprocessor built from complementary carbon nanotube transistors. Nature, 2019, 572(7771), 595 doi: 10.1038/s41586-019-1493-8

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    Received: 04 January 2021 Revised: Online: Accepted Manuscript: 09 January 2021Uncorrected proof: 12 January 2021Published: 08 February 2021

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      Genquan Han, Yue Hao. Design technology co-optimization towards sub-3 nm technology nodes[J]. Journal of Semiconductors, 2021, 42(2): 020301. doi: 10.1088/1674-4926/42/2/020301 ****G Q Han, Y Hao, Design technology co-optimization towards sub-3 nm technology nodes[J]. J. Semicond., 2021, 42(2): 020301. doi: 10.1088/1674-4926/42/2/020301.
      Citation:
      Genquan Han, Yue Hao. Design technology co-optimization towards sub-3 nm technology nodes[J]. Journal of Semiconductors, 2021, 42(2): 020301. doi: 10.1088/1674-4926/42/2/020301 ****
      G Q Han, Y Hao, Design technology co-optimization towards sub-3 nm technology nodes[J]. J. Semicond., 2021, 42(2): 020301. doi: 10.1088/1674-4926/42/2/020301.

      Design technology co-optimization towards sub-3 nm technology nodes

      DOI: 10.1088/1674-4926/42/2/020301

      • School of Microelectronics, Xidian University, Xi’an 710071, China

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      • Genquan Han：received the B. Eng degree from Tsinghua University, Beijing, in 2003, and the Ph.D. degree from the Institute of Semiconductors, Chinese Academy of Sciences, Beijing, in 2008. He was a research fellow in National University of Singapore, from 2008 to 2013. In 2013, he joined College of Optoelectronic Engineering, Chongqing University. He is currently a Professor with the School of Microelectronics, Xidian University. His current research interests include high-mobility non-silicon MOSFETs, steep-slope field-effect transistors and novel non-volatile field-effect transistors. He is currently serving as an Editor for IEEE Electron Device Letters
      • Yue Hao：is currently a Professor of Microelectronics and Solid State Electronics with Xidian University, Xi’an, China. His current interests include wide and untra-wide bandgap materials and devices, advanced CMOS devices and technology, semiconductor device reliability physics and failure mechanism, and organic electronics. Prof. Hao is a senior member of IEEE and member of the Chinese Academy of Sciences
      • Corresponding author: gqhan@xidian.edu.cn; yhao@xidian.edu.cn
      • Received Date: 2021-01-04
      • Published Date: 2021-02-10

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